TSMC's new packaging technology will bring down chip cost and improve performance

According to sources familiar with the matter, TSMC is working on a cutting-edge technology for chip packaging called CoPoS. CoPoS means Chip-on-Panel-on-Structure, and it uses a glass material that acts as a temporary carrier, and it also goes into the final substrate with a three-layer sandwich structure.

Reportedly, TSMC will start mass production of chips using CoPoS by the end of 2028. The new tech will supposedly bring down manufacturing costs and improve performance.

In fact, Nvidia's Feynman AI chipset will be the first one to use CoPoS. That's because the next-generation packaging will primarily be used for AI and high-performance computing chips.

If CoPoS turns out to be a game-changer, this will solidify TSMC's leading market position as a chip manufacturer, forcing rival companies to offer an alternative technology.

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